Systimator: A Design Space Exploration Methodology for Systolic Array based CNNs Acceleration on the FPGA-based Edge Nodes.
Hazoor AhmadMuhammad TanvirMuhammad AbdullahMuhammad Usama JavedRehan HafizMuhammad ShafiquePublished in: CoRR (2019)
Keyphrases
- design space exploration
- systolic array
- hardware software partitioning
- weighted graph
- reconfigurable architecture
- design space
- undirected graph
- data flow
- design process
- computer architecture
- cellular neural networks
- parallel architecture
- edge detection
- feature analysis
- design issues
- real world
- hardware implementation
- data processing