An Analytical Jitter Tolerance Model for DLL-Based Clock and Data Recovery Circuits.
Kyungho RyuKil-Hoon LeeJung-Pil LimJinho KimHan Su PaeJunho ParkHyun-Wook LimJae-Youl LeePublished in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
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