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A Compact, Low-Power and Low-Jitter Dual-Loop Injection Locked PLL Using All-Digital PVT Calibration.
Ahmed Musa
Wei Deng
Teerachot Siriburanon
Masaya Miyahara
Kenichi Okada
Akira Matsuzawa
Published in:
IEEE J. Solid State Circuits (2014)
Keyphrases
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low power
mixed signal
low power consumption
low cost
power consumption
high speed
vlsi circuits
camera calibration
cmos image sensor
single chip
vlsi architecture
high power
digital signal processing
image sensor
wireless transmission
logic circuits
packet loss
circuit design
delay insensitive
multi channel
real time