Compilation Strategies for Reducing Code Size on a VLIW Processor with Variable Length Instructions.
Todd T. HahnEric StotzerDineel SuleMike AsalPublished in: HiPEAC (2008)
Keyphrases
- variable length
- fixed length
- convolutional codes
- processor core
- instruction set architecture
- instruction scheduling
- n gram
- bitstream
- instruction set
- text compression
- statistical dependencies
- coding scheme
- computational complexity
- level parallelism
- error detection
- code generation
- machine learning
- operating system
- image segmentation