Micropipeline Architecture for Multiplier-less FIR Filters.

Saeid Nooshabadi Juan A. Montiel-Nelson G. S. Visweswaran D. Nagchoudhuri

Published in: VLSI Design (1997)

Keyphrases

power consumption
fir filters
low power
vlsi implementation
hardware implementation
shift register
high speed
real time
low cost
filter design
finite impulse response
pattern recognition
gray level
filter bank
linear algebra