Login / Signup
A 100-GS/s Four-to-One Analog Time Interleaver in 55-nm SiGe BiCMOS.
Hannes Ramon
Michiel Verplaetse
Michael Vanhoecke
Haolin Li
Johan Bauwelinck
Peter Ossieur
Xin Yin
Guy Torfs
Published in:
IEEE J. Solid State Circuits (2021)
Keyphrases
</>
mixed signal
cmos technology
low power
multi channel
power consumption
low voltage
high speed
error correction
parallel processing
digital circuits
low cost
power dissipation
image sensor
real time
turbo codes
signal to noise ratio
vlsi architecture
data mining