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An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS.
Christian Jesús B. Fayomi
Gilson I. Wirth
David M. Binkley
Akira Matsuzawa
Published in:
ICECS (2009)
Keyphrases
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successive approximation
high speed
vector quantization
post processing
source coding
image compression
low power
image processing
feature vectors
rate distortion
image coding
low complexity
entropy coding
analog to digital converter