High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2: 1 Multiplexer and 1: 2 Demultiplexer Modules Using 1-µm InP/InGaAs/InP Double Heterojunction Bipolar Transistors.
Yutaka ArayashikiTakashi KamizonoYukio OhkuboTaisuke MatsumotoYoshiaki AmanoYutaka MatsuokaPublished in: IEICE Trans. Electron. (2013)
Keyphrases
- bit rate
- video coding
- video quality
- high density
- rate distortion
- bitstream
- inter frame
- visual quality
- motion vectors
- rate control
- macroblock
- multiview video coding
- packet loss
- image quality
- rate adaptation
- computational complexity
- coding efficiency
- motion estimation
- coding method
- compression efficiency
- intra frame
- rate control algorithm
- motion compensation
- multiple views
- digital images
- color images
- video sequences
- three dimensional