Efficient hardware implementation of cellular neural networks with powers-of-two based incremental quantization.
Xiaowei XuQing LuTianchen WangJinglan LiuYu HuYiyu ShiPublished in: NCS (2017)
Keyphrases
- hardware implementation
- cellular neural networks
- efficient implementation
- dedicated hardware
- signal processing
- fpga implementation
- hardware design
- neural network
- fixed point
- field programmable gate array
- pairwise
- hardware architecture
- software implementation
- real time
- pipeline architecture
- image quality
- software engineering
- feature extraction
- parallel architecture
- data mining
- fpga technology