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A Hybrid-Mode On-Chip Router for the Large-Scale FPGA-Based Neuromorphic Platform.
Chen Ding
Yuxiang Huan
Hao Jia
Yulong Yan
Fanxi Yang
Lizheng Liu
Meigen Shen
Zhuo Zou
Lirong Zheng
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2022)
Keyphrases
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real world
low cost
high speed
network on chip
small scale
analog vlsi
real time
real life
application specific
evolutionary algorithm
hardware implementation
high density
single chip
physical design
evolvable hardware