OSCAR: Orchestrating STT-RAM cache traffic for heterogeneous CPU-GPU architectures.
Jia ZhanOnur KayiranGabriel H. LohChita R. DasYuan XiePublished in: MICRO (2016)
Keyphrases
- heterogeneous computing
- memory hierarchy
- memory access
- main memory
- memory bandwidth
- cache misses
- real time
- multithreading
- memory management
- graphics processing units
- compute intensive
- graphics processors
- data access
- computing power
- gpu implementation
- parallel computing
- grid computing
- shared memory
- random access memory
- general purpose
- traffic flow
- flash memory
- network traffic
- heterogeneous environments
- parallel architectures
- road network
- access patterns
- parallel computation
- external memory
- prefetching
- secondary storage
- single instruction multiple data
- data structure
- operating system
- computer architecture
- parallel implementation
- b tree
- load balancing
- graphics hardware
- database management systems
- hardware implementation
- query processing
- higher throughput
- high performance computing