Low Power Dual Edge-Triggered Static D Flip-Flop.
AnuragGurmohan SinghVemu SulochanaPublished in: CoRR (2013)
Keyphrases
- low power
- power dissipation
- cmos technology
- power consumption
- flip flops
- low cost
- high speed
- edge detection
- digital signal processing
- high power
- logic circuits
- low power consumption
- single chip
- wireless transmission
- vlsi architecture
- vlsi circuits
- power reduction
- computer vision
- multiple input
- real time
- mixed signal
- image sensor
- signal processing
- signal processor
- gate array