Current Multiplier Based Synapse and Neuron Circuits for Compact SNN Chip.

Malik Summair Asghar Saad Arslan HyungWon Kim

Published in: ISCAS (2021)

Keyphrases

high speed
analog vlsi
nearest neighbor
circuit design
chip design
lateral inhibition
neural network
genetic algorithm
low cost
data sets
high density
learning rules
interior point methods
random access memory