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Design of capless LDO regulator with low voltage application based ESD protection circuit using SR-latch switch structure.
Sang-Wook Kwon
Yong-Seo Koo
Published in:
IEICE Electron. Express (2022)
Keyphrases
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low voltage
cmos technology
design considerations
low power
high speed
circuit design
user interface
steady state
power consumption
digital circuits
real time
power dissipation
low cost
imaging systems
power management