A new adiabatic technique for designing low power array architectures.

C. Z. Lolas Dimitrios Soudris Ioannis Karafyllidis Adonios Thanailakis

Published in: ICECS (1999)

Keyphrases

low power
power consumption
low cost
high speed
image sensor
single chip
high power
vlsi circuits
low power consumption
vlsi architecture
digital signal processing
logic circuits
wireless transmission
real time
power reduction
gate array
cmos technology
focal plane