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Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs.
Shih-Hung Chen
Ming-Dou Ker
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2009)
Keyphrases
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high speed
power dissipation
low power
power consumption
chip design
analog vlsi
circuit design
cmos technology
power reduction
detection method
detection algorithm
single chip
real time
false positives
object detection
infrared
anomaly detection
design methodology