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Demonstration of improvement of specific on-resistance versus breakdown voltage tradeoff for low-voltage power LDMOS.

Zhaozhao XuDonghua LiuJun HuFeng JinXinjie YangWenting DuanWei YueZiquan FangWensheng QianWeiran KongShichang Zou
Published in: Microelectron. J. (2019)
Keyphrases
  • low voltage
  • power management
  • design considerations
  • power line
  • power consumption
  • reactive power
  • leakage current
  • cmos technology
  • power system
  • high speed
  • energy consumption
  • intelligent tutoring systems