A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme.
Song GuoYong DouYuanwu LeiGuiming WuPublished in: IEICE Electron. Express (2015)
Keyphrases
- field programmable gate array
- hardware implementation
- embedded systems
- low cost
- hardware architecture
- hardware design
- parallel architecture
- protection scheme
- processing capabilities
- hardware architectures
- hardware and software
- vlsi implementation
- real time
- data storage
- massively parallel
- storage and retrieval
- storage requirements
- parallel implementation
- computing systems
- signal processing
- image processing
- random access
- application specific
- garbage collection