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A 13.8pJ/Access/Mbit SRAM with charge collector circuits for effective use of non-selected bit line charges.

Shinichi MoriwakiYasuhiro YamamotoAtsushi KawasumiToshikazu SuzukiShinji MiyanoTakayasu SakuraiHirofumi Shinohara
Published in: VLSIC (2012)
Keyphrases
  • random access memory
  • access control
  • case study
  • data sets
  • databases
  • neural network
  • feature selection
  • data structure
  • information access