P/G pad placement optimization in USB test chips.
Vazgen Sh. MelikyanKaro H. SafaryanF. A. AslikyanPublished in: EWDTS (2017)
Keyphrases
- high speed
- optimal placement
- optimization method
- information retrieval
- optimization algorithm
- integrated circuit
- optimization process
- data sets
- sensor networks
- optimization model
- global optimization
- databases
- genetic algorithm
- high end
- constrained optimization
- statistical tests
- combinatorial optimization
- input output
- optimization problems
- simulated annealing