A 4×20-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS.
Shuai YuanLiji WuZiqiang WangXuqiang ZhengWen JiaChun ZhangZhihua WangPublished in: CICC (2015)