Design of a low-power quadrature LC-VCO in 65 nm CMOS.
Carlos Sánchez-AzquetaJavier AguirreGuillermo RoyoFrancisco AznarErick GuerreroSantiago CelmaPublished in: ECCTD (2017)
Keyphrases
- low power
- cmos technology
- power consumption
- single chip
- nm technology
- low cost
- high speed
- low power consumption
- vlsi architecture
- logic circuits
- ultra low power
- power dissipation
- power reduction
- gate array
- mixed signal
- digital signal processing
- vlsi circuits
- low voltage
- high power
- cmos image sensor
- circuit design
- image sensor
- wireless transmission
- delay insensitive
- signal processing
- real time
- power saving