The Design of Fast Asynchronous Adder Structures and their Implementation Using D.C.V.S. Logic.
Marc RenaudinBachar El-HassanPublished in: ISCAS (1994)
Keyphrases
- high level synthesis
- efficient implementation
- logic circuits
- implementation issues
- micron cmos
- delay insensitive
- asynchronous communication
- design methodology
- design considerations
- design decisions
- neural network
- power dissipation
- design patterns
- design process
- user interface
- logic synthesis
- expert systems
- information systems