On-chip structure and addressing scheme design for 2-D block data processing in a 64-core array system.

Jing Xie Huimin Xing Zhigang Mao

Published in: VLSI-SoC (2011)

Keyphrases

data processing
programmable logic
circuit design
case study
single chip
high speed
design process
database
physical design
vlsi implementation
modular design
real time
data analysis
user interface
embedded systems
evolvable hardware