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2.5 V 43-45 Gb/s CDR Circuit and 55 Gb/s PRBS Generator in SiGe Using a Low-Voltage Logic Family.
Daniel Kucharski
Kevin T. Kornegay
Published in:
IEEE J. Solid State Circuits (2006)
Keyphrases
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low voltage
high speed
random access memory
cmos technology
power line
mixed signal
design considerations
power management
computer vision
digital images
parallel processing
digital circuits
logic circuits