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A 1R/1W SRAM Cell Design to Keep Cell Current and Area Saving against Simultaneous Read/Write Disturbed Accesses.
Hiroyuki Yamauchi
Toshikazu Suzuki
Yoshinobu Yamagami
Published in:
IEICE Trans. Electron. (2007)
Keyphrases
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read write
database
real time
data model
database applications
design considerations