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An Average-Performance-Oriented Subthreshold Processor Self-Timed by Memory Read Completion.
Hiroshi Fuketa
Dan Kuroda
Masanori Hashimoto
Takao Onoye
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2011)
Keyphrases
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memory management
read write
processor core
intel xeon
standard deviation
computing power
memory subsystem
level parallelism
shared memory multiprocessors
memory requirements
operating system
memory hierarchy
random access memory
hardware implementation
memory usage
high speed
real time