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Performance-aware predictive-model-based on-chip body-bias regulation strategy for an ULP multi-core cluster in 28 nm UTBB FD-SOI.
Alfio Di Mauro
Davide Rossi
Antonio Pullini
Philippe Flatresse
Luca Benini
Published in:
Integr. (2020)
Keyphrases
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silicon on insulator
clustering algorithm
average reward reinforcement learning
low cost
high speed
cmos technology
analog vlsi
ibm power processor
hierarchical clustering
circuit design
data sets
evolutionary algorithm
fully unsupervised
programmable logic
dynamic random access memory