Design of ACS Architecture Using FinFET and CNTFET Devices for Low-Power Viterbi Decoder Using Asynchronous Techniques for Digital Communication Systems.
A. Bernard RayappaT. V. P. SundararajanPublished in: J. Circuits Syst. Comput. (2022)
Keyphrases
- low power
- communication systems
- mixed signal
- vlsi architecture
- low power consumption
- power consumption
- single chip
- low cost
- high speed
- cmos technology
- analog to digital converter
- cmos image sensor
- logic circuits
- low complexity
- nm technology
- multi channel
- power dissipation
- real time
- digital signal processing
- information processing systems
- computer systems
- communication technologies
- design methodology
- delay insensitive
- image sensor
- digital circuits
- design considerations
- vlsi implementation
- gate array
- data flow
- application specific
- embedded systems
- computer simulation
- user interface