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SET and noise fault tolerant circuit design techniques: Application to 7 nm FinFET.

Antonio CalomardeEsteve AmatFrancesc MollJulio VigaraAntonio Rubio
Published in: Microelectron. Reliab. (2014)
Keyphrases
  • fault tolerant
  • circuit design
  • fault tolerance
  • distributed systems
  • load balancing
  • low cost
  • high availability
  • state machine