Design of Interconnected Bus for Low Power Based on Boolean Process.

Donghai Li Guang-Sheng Ma Gang Feng

Published in: APCCAS (2006)

Keyphrases

low power
high speed
power consumption
design process
single chip
low cost
low power consumption
vlsi architecture
logic circuits
digital signal processing
power dissipation
gate array
cmos technology
wireless transmission
signal processing
power reduction
real time
digital circuits
computer simulation