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A Clock-Gating Method for Low-Power LSI Design.
Takeshi Kitahara
Fumihiro Minami
Toshiaki Ueda
Kimiyoshi Usami
Seiichi Nishio
Masami Murakata
Takashi Mitsuhashi
Published in:
ASP-DAC (1998)
Keyphrases
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low power
low cost
power consumption
vlsi architecture
power reduction
pattern recognition
high speed
computational power