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A Clock-Gating Method for Low-Power LSI Design.

Takeshi KitaharaFumihiro MinamiToshiaki UedaKimiyoshi UsamiSeiichi NishioMasami MurakataTakashi Mitsuhashi
Published in: ASP-DAC (1998)
Keyphrases
  • low power
  • low cost
  • power consumption
  • vlsi architecture
  • power reduction
  • pattern recognition
  • high speed
  • computational power