A 76-Gbit/s 265-GHz CMOS Receiver.

Shinsuke Hara Ruibing Dong Sangyeop Lee Kyoya Takano Naoya Toshida Satoru Tanoi Tatsuo Hagino Mohamed H. Mubarak Norihiko Sekine Issei Watanabe Akifumi Kasamatsu Kunio Sakakibara Shunichi Kubo Satoshi Miura Yohtaro Umeda Takeshi Yoshida Shuhei Amakawa Minoru Fujishima

Published in: A-SSCC (2021)

Keyphrases

high speed
power consumption
low power
low cost
analog vlsi
frequency band
dual band
circuit design
hd video
vlsi circuits
power supply
single chip
neural network
cmos image sensor
image sensor
image sequences
rolling shutter
real time