Design and Analysis of a Modified Low Power CMOS Full Adder Using Gate-Diffusion Input Technique.
Kiran K. ChaddhaRajeevan ChandelPublished in: J. Low Power Electron. (2010)
Keyphrases
- low power
- cmos technology
- logic circuits
- power consumption
- single chip
- power dissipation
- low cost
- high speed
- nm technology
- vlsi architecture
- low power consumption
- digital signal processing
- mixed signal
- ultra low power
- gate array
- vlsi circuits
- high power
- low voltage
- power reduction
- cmos image sensor
- image sensor
- wireless transmission
- vlsi implementation
- delay insensitive
- signal processor
- data flow
- power management