Memory Interfacing and Instruction Specification for Reconfigurable Processors.
Jeffrey A. JacobPaul ChowPublished in: FPGA (1999)
Keyphrases
- memory hierarchy
- instruction set
- level parallelism
- instruction set architecture
- computing power
- parallel processing
- main memory
- control flow
- memory subsystem
- computer architecture
- memory access
- multithreading
- parallel algorithm
- computational power
- memory bandwidth
- memory requirements
- secondary storage
- processing elements
- memory space
- low cost
- memory management
- compute intensive
- memory usage
- hardware implementation
- floating point
- data flow
- general purpose
- high speed
- parallel processors
- multimedia
- specification language
- multi core processors
- reconfigurable architecture
- cache misses
- parallel computation
- speculative execution
- parallel architecture
- computer assisted instruction
- random access
- shared memory
- application specific
- data structure