A dynamically-allocated virtual channel architecture with congestion awareness for on-chip routers.

Ming-che Lai Zhiying Wang Lei Gao Hongyi Lu Kui Dai

Published in: DAC (2008)

Keyphrases

high speed
ip networks
analog vlsi
virtual environment
real time
end to end
management system
low cost
multi channel
vlsi implementation
load balancing
host computer
mixed signal
virtual reality
network on chip
middle layer
cmos technology
network architecture
network traffic
augmented reality
virtual world