Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures.
Evgeni KrimerPatrick ChiangMattan ErezPublished in: ISCA (2012)
Keyphrases
- input output
- parallel architectures
- massively parallel
- error free
- error rate
- error bounds
- parallel processing
- traffic flow
- single instruction multiple data
- information retrieval
- relative error
- parallel algorithm
- wide range
- parallel implementation
- least squares
- linear complexity
- highly parallel
- knowledge base
- lane detection
- computer vision