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Design sensitivity of single event transients in scaled logic circuits.

Jyothi VelamalaRobert LiVolsiMyra TorresYu Cao
Published in: DAC (2011)
Keyphrases
  • logic circuits
  • design process
  • case study
  • low power
  • functional decomposition
  • pattern recognition
  • user interface
  • image analysis
  • query language
  • low cost
  • embedded systems
  • design methodology