FPGA Implementations of BCD Multipliers.
Gustavo SutterElias TodorovichGery BioulMartín VazquezJean-Pierre DeschampsPublished in: ReConFig (2009)
Keyphrases
- artificial intelligence
- software implementation
- hardware architectures
- hardware implementation
- high speed
- efficient implementation
- field programmable gate array
- real time image processing
- hardware architecture
- low cost
- verilog hdl
- general purpose processors
- single chip
- search algorithm
- fpga implementation
- signal processing
- evolutionary algorithm
- artificial neural networks
- image processing
- computer vision
- information retrieval
- gate array
- real time