A low power, high dynamic range and area efficient cyclic on-chip delay measurement architecture.
R. KrishnamurthyMohammad S. HashmiPublished in: ICM (2014)
Keyphrases
- low power
- high speed
- low cost
- high dynamic range
- dynamic range
- power dissipation
- mixed signal
- cmos technology
- cmos image sensor
- power consumption
- single chip
- nm technology
- vlsi architecture
- image sensor
- low power consumption
- signal processor
- tone mapping
- wide dynamic range
- real time
- image capture
- multi channel
- logic circuits
- vlsi implementation
- ultra low power
- digital signal processing
- high dynamic range images
- image quality
- digital circuits
- hardware and software
- frame rate
- image data