A low-power half-delay-line fast skew-compensation circuit.
Yi-Ming WangJinn-Shyan WangPublished in: IEEE J. Solid State Circuits (2004)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power reduction
- power dissipation
- power consumption
- low cost
- gate array
- delay insensitive
- vlsi circuits
- single chip
- high power
- mixed signal
- wireless transmission
- digital signal processing
- image sensor
- energy dissipation
- wide dynamic range
- general purpose
- low power consumption
- low voltage
- real time
- hardware implementation
- hardware and software
- ultra low power