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A simulation study on the effectiveness of n-guardring/p-guardring on latchup in 0.8 μm CMOS technology.
Varna Puvvada
S. Potla
S. Tamizh Selvam
P. R. Suresh
Published in:
VLSI Design (1995)
Keyphrases
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simulation study
cmos technology
power consumption
real time
spl times
low voltage
image processing
low power
monte carlo
computer vision
case study
pattern recognition
dynamic programming
machine vision