AµFLIPS: An Asynchronous Microprocessor With FLexIbly-timed Pipeline Stages.
Zaheer TabassamSyed Rameez NaqviAndreas SteiningerPublished in: DDECS (2022)
Keyphrases
- petri net
- high speed
- special purpose hardware
- state machines
- timed automata
- floating point
- asynchronous communication
- multistage
- design methodology
- discussion forums
- multiple stages
- machine learning
- image sequences
- finite state machines
- real time
- discrete event
- physical design
- website
- information retrieval
- processing pipeline
- pipeline architecture
- neural network