Retiming sequential circuits for low power.
José MonteiroSrinivas DevadasAbhijit GhoshPublished in: ICCAD (1993)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power consumption
- delay insensitive
- power reduction
- vlsi circuits
- low cost
- power dissipation
- mixed signal
- high power
- single chip
- wireless transmission
- digital signal processing
- vlsi architecture
- low voltage
- image sensor
- nm technology
- computer simulation
- gate array
- asynchronous circuits
- multi channel
- signal processing