Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU.
Joel GrodsteinRachid RayessTad TruexLinda ShattuckSue LowellDan BaileyDavid BertucciGabriel P. BischoffDaniel E. DeverMike GowanRoy LaneBrian LillyKrishna NagallaRahul ShahEmily ShriverShi-Huang YinShannon V. MortonPublished in: ACM Great Lakes Symposium on VLSI (2002)
Keyphrases
- multithreading
- cache misses
- power consumption
- intel xeon
- memory hierarchy
- computer aided
- memory access
- main memory
- prefetching
- high speed
- computational power
- power distribution
- design process
- parallel computing
- computer aided design
- data access
- hit rate
- clock frequency
- frequency band
- computer graphics
- medical images
- power reduction
- object oriented