An FPGA Implementation of Array LDPC Decoder.

Jin Sha Minglun Gao Zhongjin Zhang Li Li Zhongfeng Wang

Published in: APCCAS (2006)

Keyphrases

fpga implementation
hardware implementation
low density parity check
ldpc codes
signal processing
neural network
image processing algorithms
field programmable gate array
channel coding
turbo codes
distributed source coding
pattern recognition
error correction
distributed video coding