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) of CMOS logic circuits with post-fabrication automatically selective charge injection.
Kentaro Honda
Katsuyuki Ikeuchi
Masahiro Nomura
Makoto Takamiya
Takayasu Sakurai
Published in:
ISLPED (2011)
Keyphrases
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logic circuits
low power
high speed
low cost
power consumption
functional decomposition
power dissipation
integrated circuit
real time
sensor networks
fuzzy neural network
circuit design
cmos technology
logic synthesis
gate array