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Design of Robust Latch for Multiple-Node Upset (MNU) Mitigation in Nanoscale CMOS Technology.

Nan ZhangXiaohui SuJing Guo
Published in: IEEE Access (2020)
Keyphrases
  • cmos technology
  • low power
  • power consumption
  • power dissipation
  • low voltage
  • computer vision
  • low cost
  • efficient implementation
  • single chip
  • design process
  • user interface
  • object oriented
  • single image