Design of an Area-Efficient and Low-Power Hierarchical NoC Architecture Based on Circuit Switching.
Woo Joo KimSung Hee LeeSun Young HwangPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2009)
Keyphrases
- low power
- cmos technology
- vlsi architecture
- logic circuits
- high speed
- power dissipation
- power consumption
- mixed signal
- nm technology
- single chip
- low cost
- network on chip
- power reduction
- low power consumption
- gate array
- vlsi circuits
- tunnel diode
- low voltage
- digital signal processing
- wireless transmission
- parallel processing
- high power
- cmos image sensor
- vlsi implementation
- real time
- image sensor
- energy dissipation
- sigma delta
- ultra low power
- delay insensitive
- circuit design
- design methodology
- multi channel
- digital camera
- low complexity
- signal processing
- image processing