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A Novel CML Latch-Based Wave-Pipelined Asynchronous SerDes Transceiver for Low-Power Application.
Mahesh Kumawat
Mohit Singh Choudhary
Ravi Kumar
Gaurav Singh
Santosh Kumar Vishvakarma
Published in:
J. Circuits Syst. Comput. (2020)
Keyphrases
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model based diagnosis
low power
ultra low power
power consumption
high speed
low cost
wireless transmission
delay insensitive
single chip
low power consumption
digital signal processing
logic circuits
vlsi architecture
high power
vlsi circuits
gate array
frequency domain
computer simulation
real time